Even if an IP block is designed with strong security protections, it can become vulnerable after synthesis. At the RTL stage, security logic may look correct. But during synthesis, the tool is allowed to optimize the design. One common optimization is retiming, where registers are moved around to improve performance. When this happens, security countermeasures that depend on having multiple hardened or duplicated registers can stop working as intended. Simply put, synthesis can rearrange or remove the very structures that were added for security.

Designers sometimes try to prevent this using synthesis directives like dont_touch, but such directives are easy to misuse and effective only when applied with correct scope and intent. Furthermore, it can conflict with other directives (e.g., “set_max_fanout”), cause performance degradation, and introduce timing issues. Because of these limitations, dont_touch does not guarantee that security logic will survive synthesis.

As a result, IP that looks secure at RTL can behave very differently after synthesis. Security checks done only at the RTL level can miss real vulnerabilities that appear in the gate-level design. To truly understand whether an IP is secure, the synthesized implementation must also be examined.